Reprogrammable input-output pins for forming different chip...

Details Reprogrammable input-output pins for forming different chip... Reprogrammable input-output pins for forming different chip...

2005-08-16

2005-08-16

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Intrasystem connection

C710S305000, C710S003000

Reexamination Certificate

active

06931466

ABSTRACT:
Disclosed is a reprogrammable I/O system for a chip or board system that can be reprogrammed to simulate many I/O interfaces in firmware. The reprogrammable I/O system comprises an I/O cluster, an I/O bus, I/O pins, and logic at the I/O pins. The I/O pins are arranged logically in a row and are grouped into pin groups of eight pins. Each pin group also includes a pin state machine (PSM) and a data FIFO coupled together. Each PSM has chain connections to the two neighboring PSM's. Each data FIFO has chain connections to the two neighbor data FIFO's. The reprogrammable I/O system allows firmware to organize the I/O pins into I/O interfaces. The firmware in PSM's and the I/O cluster that control the operations of the I/O pins can be changed (reprogrammed) so that the I/O system can perform other different interfaces.

REFERENCES:
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patent: 5951667 (1999-09-01), Abramson
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patent: 6012116 (2000-01-01), Aybay et al.
patent: 6311245 (2001-10-01), Klein
patent: 6687775 (2004-02-01), Bassett

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