Reliable wafer-scale integrated computing systems

Details Reliable wafer-scale integrated computing systems Reliable wafer-scale integrated computing systems

1990-10-17

2000-01-25

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

714 43, H04B 1700

Patent

active

06018812&

ABSTRACT:
Wafer scale integrated circuitry which uses a cluster of wafer components, each component having a plurality of processing elements and a network element connected thereto for controlling the transfer of information to and from the processing elements. The network element is connected to network elements of other wafer components of the cluster for controlling the transfer of information to and from such other network elements. One or more redundant groups of processing elements are formed on the wafer components of the cluster, each redundant group being configured so that the processing elements in the group reside on different ones of the wafer components.

REFERENCES:
patent: 4907232 (1990-03-01), Harper et al.
patent: 4937741 (1990-06-01), Harper et al.
patent: 4970724 (1990-11-01), Yung
patent: 5042038 (1991-08-01), Protor et al.
patent: 5144627 (1992-09-01), Horie et al.

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