Relaxed silicon germanium substrate with low defect density

Details Relaxed silicon germanium substrate with low defect density Relaxed silicon germanium substrate with low defect density

2005-04-12

2005-04-12

Blum, David S. (Department: 2813)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Reexamination Certificate

active

06878610

ABSTRACT:
A method of forming a strained silicon layer on a relaxed, low defect density semiconductor alloy layer such as SiGe, has been developed. In a first embodiment of this invention the relaxed, low density SiGe layer is epitaxially grown on an silicon layer which in turn is located on an underlying SiGe layer. During the epitaxial growth of the overlying SiGe layer defects are formed in the underlying silicon layer resulting in the desired, relaxation, and decreased defect density for the SiGe layer. A second embodiment features an anneal procedure performed during growth of the relaxed SiGe layer, resulting in additional relaxation and decreased defect density, while a third embodiment features an anneal procedure performed to the underlying silicon layer prior to epitaxial growth of the relaxed SiGe layer, again allowing optimized relaxation and defect density to be realized for the SiGe layer. The ability to obtain a strained silicon layer on a relaxed, low defect density SiGe layer, allows devices with enhanced carrier mobility to be formed in the surface of the strained silicon layer, with decreased risk of leakage due the presence of the underlying, relaxed, low defect density SiGe layer.

REFERENCES:
patent: 5759898 (1998-06-01), Ek et al.
patent: 6059895 (2000-05-01), Chu et al.
patent: 6291321 (2001-09-01), Fitzgerald
patent: 6313016 (2001-11-01), Kibbel et al.
patent: 6323108 (2001-11-01), Kub et al.
patent: 6331445 (2001-12-01), Janz et al.
patent: 6559471 (2003-05-01), Finder et al.
patent: 6590236 (2003-07-01), El-Zein et al.
patent: 000515859 (1992-04-01), None
Z. Yang et al., “In Situ Relaxed Si1-xGex Epitaxial Layers with Low Threading Dislocation Densities Grown on Compliant Si-On-Insulator Substrates,” J. Vac. Sci. Technol. B 16(3), May/Jun., 1998, pp. 1489-1491.
Rim et al., “Fabrication and Analysis of Deep Submicron Strained-Si N-MOSFET's, ” IEEE Trans. on Electron Devices, vol. 47, No. 7, Jul. 2000, pp. 1406-1415.

Affiliated with

Also associated with

Rating

Relaxed silicon germanium substrate with low defect density does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Relaxed silicon germanium substrate with low defect density, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Relaxed silicon germanium substrate with low defect density will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3384316