Relaxed, low-defect SGOI for strained Si CMOS applications

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Fluid growth from gaseous state combined with subsequent...

Reexamination Certificate

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C438S795000

Reexamination Certificate

active

06946373

ABSTRACT:
Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the SiGe layer into islands changes the local forces acting at each of the island edges in such a way so that the relaxation force is greater than the forces that oppose relaxation. The absence of restoring forces at the edges of the patterned layers allows the final SiGe film to relax further than it would if the film was continuous.

REFERENCES:
patent: 5461243 (1995-10-01), Ek et al.
patent: 5847419 (1998-12-01), Imai et al.
patent: 5891769 (1999-04-01), Liaw et al.
patent: 6326667 (2001-12-01), Sugiyama et al.
patent: 6369438 (2002-04-01), Sugiyama et al.
patent: 6583000 (2003-06-01), Hsu et al.
patent: 6680240 (2004-01-01), Maszara
patent: 6746902 (2004-06-01), Maa et al.
patent: 2003/0013305 (2003-01-01), Sugii et al.
patent: 2004/0067644 (2004-04-01), Malik et al.
H. Yin, et al., “Strain relaxation of SiGe islands on compliant oxide”, Journal of Applied Physics, vol. 91, No. 12, Jun. 15, 2002, pp. 9716-9722.
T. Tezuka, et al., “Dislocation-free formation of relaxed SiGe-on-insulator layers”, Applied Physics Letters, vol. 80, No. 19, May 13, 2002, pp. 3560-3562.

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