Refresh strategy for DRAMs

Details Refresh strategy for DRAMs Refresh strategy for DRAMs

1995-05-14

1997-08-05

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Data refresh

365149, 365193, 365227, 365228, 36523003, G11C 700

Patent

active

056549296

ABSTRACT:
An improved method of accessing dynamic random access memory (DRAM) banks during refresh cycles contemplates sequentially accessing DRAM banks which do not share common filtering capacitors. In this manner, voltage drops caused by refresh accesses are not observed in consecutive clock cycles at the same filtering capacitors so that the filtering capacitors will have sufficient recovery time to restore the supply voltage to the original voltage level before another refresh hit occurs at the same capacitor. In this manner, significant voltage drops are alleviated at the voltage supply inputs to the DRAM banks.

REFERENCES:
patent: 5475645 (1995-12-01), Wada
patent: 5500831 (1996-03-01), Chen et al.

Affiliated with

Also associated with

Rating

Refresh strategy for DRAMs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Refresh strategy for DRAMs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Refresh strategy for DRAMs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1079762