Redundancy repair circuit and a redundancy repair method...

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S225700

Reexamination Certificate

active

07317645

ABSTRACT:
A redundancy repair circuit and method therefor for use with a semiconductor memory device are provided. The redundancy repair circuit comprises: a memory circuit having a plurality of address lines and a plurality of redundancy address lines in a memory cell; a repair redundancy control circuit for repairing a defective address line using a redundancy address line of the plurality of redundancy address lines, and for encoding and outputting fuse repair information corresponding to redundancy address information, wherein addresses corresponding to defective memory cells are pre-programmed; and a redundancy line driver for receiving the fuse repair information from the repair redundancy control circuit, for decoding the fuse repair information and for activating a redundancy line corresponding to the decoded fuse repair information, wherein the repair redundancy control circuit is separate from the redundancy line driver.

REFERENCES:
patent: 5835425 (1998-11-01), Berger
patent: 6310806 (2001-10-01), Higashi et al.
patent: 6385071 (2002-05-01), Chai et al.
patent: 6714451 (2004-03-01), Ooishi et al.
patent: 6741509 (2004-05-01), Kato et al.
patent: 6901015 (2005-05-01), Shinohara
patent: 11-260094 (1999-09-01), None
patent: 2002-0025348 (2002-04-01), None

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