Recessed gate structure with reduced current leakage and...

Details Recessed gate structure with reduced current leakage and... Recessed gate structure with reduced current leakage and...

2006-03-14

2006-03-14

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S230000, C438S303000, C438S591000, C438S595000

Reexamination Certificate

active

07012014

ABSTRACT:
A gate structure and method for forming the same the method including providing a silicon substrate including one of N and P-well doped regions and an overlying the CVD silicon oxide layer; forming an opening in the CVD silicon oxide layer to include a recessed area extending into a thickness portion of the silicon substrate; thermally growing a gate oxide over exposed silicon substrate portions of the recessed area; backfilling the opening with polysilicon; planarizing the polysilicon to the opening level to reveal the silicon oxide layer; and, selectively removing the silicon oxide layer to form a recessed gate structure.

REFERENCES:
patent: 6165826 (2000-12-01), Chau et al.
patent: 6171916 (2001-01-01), Sugawara et al.
patent: 6358800 (2002-03-01), Tseng
patent: 6423618 (2002-07-01), Lin et al.

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