Recessed channel transistors that include pad structures

Details Recessed channel transistors that include pad structures Recessed channel transistors that include pad structures

2011-05-03

2011-05-03

Pham, Thanhha (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S397000, C257SE29201, C257SE27091

Reexamination Certificate

active

07936012

ABSTRACT:
Methods of forming pad structures are provided in which a first contact region and second contact regions are formed in an active region of a substrate. An insulating interlayer is formed on the substrate. The insulating interlayer has a first opening that exposes the first contact region and the second contact regions. First conductive pads are formed in the first opening. Each first conductive pad is in electrical contact with a respective one of the second contact regions. Spacers are formed, where each spacer is on a sidewall of a respective one of the first conductive pads. Finally, a second conductive pad is formed between the first conductive pads and in electrical contact with the first contact region to complete the pad structure.

REFERENCES:
patent: 7741174 (2010-06-01), Cho
patent: 155831 (1998-07-01), None
patent: 1020030056321 (2003-07-01), None
patent: 533956 (2005-11-01), None
patent: 0620655 (2006-08-01), None

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