Reading data from a memory with a memory access controller

Details Reading data from a memory with a memory access controller Reading data from a memory with a memory access controller

2006-06-27

2006-06-27

Baker, Stephen M. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S731000

Reexamination Certificate

active

07069485

ABSTRACT:
A serial scan path communication architecture includes a plurality of circuits (30), some of which may include a memory (36). A memory access controller (38) is included in circuits with a memory (36) such that serial data may be written to and written from the memories without having to repetitively cycle through multiple TAP read or write operations operations.

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