Read/write control circuit for semiconductor memory device

Details Read/write control circuit for semiconductor memory device Read/write control circuit for semiconductor memory device

1997-07-25

1999-03-02

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518904, 36518907, 365233, G11C 1604

Patent

active

058779884

ABSTRACT:
A write error preventing circuit for a semiconductor memory device prevents an erroneous reading operation an input buffer compares an externally applied write enable signal to an effective level signal, which is preset therein. A write error preventive circuit outputs a disable signal to the input buffer during an interval of time when a ground voltage bounces in accordance with an internal output signal from a NAND gate of an output buffer. The circuit prevents the outputting of a write signal from the input buffer during a read operation in accordance with the internal output signal from the output buffer when the ground voltage bounces.

REFERENCES:
patent: 4712197 (1987-12-01), Sood
patent: 5701275 (1997-12-01), McClure
patent: 5708608 (1998-01-01), Park et al.

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