Read-out circuit for a dynamic memory circuit, memory cell...

Details Read-out circuit for a dynamic memory circuit, memory cell... Read-out circuit for a dynamic memory circuit, memory cell...

2005-07-26

2005-07-26

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230080

Reexamination Certificate

active

06922365

ABSTRACT:
A read-out circuit for a dynamic memory circuit has an interchanging circuit. The interchanging circuit can apply the bit lines that are connected to the storage capacitors to the second and third data output lines and to apply the bit lines that are not connected to the memory cells to the first and fourth data output lines. Sense amplifiers, in each case, are provided for amplifying a potential difference on a first line and a second line. A first sense amplifier is connected to the first and the second data output line. A second sense amplifier is connected to the third and the fourth data output line. A third sense amplifier is connected to the second and the third data output line.

REFERENCES:
patent: 5161120 (1992-11-01), Kajimoto et al.
patent: 6028796 (2000-02-01), Miyabayashi
patent: 6275407 (2001-08-01), Otsuka
patent: 6665204 (2003-12-01), Takeda
patent: 2001/0011735 (2001-08-01), Takeda

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