Read-accessible column latch for non-volatile memories

Details Read-accessible column latch for non-volatile memories Read-accessible column latch for non-volatile memories

2006-10-24

2006-10-24

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230080

Reexamination Certificate

active

07126860

ABSTRACT:
Program column latch circuitry of nonvolatile memory is provided with read-back capability to verify that data bits have been correctly loaded into the latch circuits and written to the memory cells. The interface between the low voltage latches and the external input and output data paths is provided with opposite-facing tri-state buffers that allow latched data to be read out for comparison and verification. Writing of latched data to memory cells can be verified by the read-back without needing any external RAM.

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