Random cache read using a double memory

Details Random cache read using a double memory Random cache read using a double memory

2006-01-17

2008-09-09

Mai, Son L (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S185120, C365S185330, C365S189200

Reexamination Certificate

active

07423915

ABSTRACT:
A non-volatile memory, such as a Flash memory, is configured to perform a random multi-page read operation. The memory may include a core array of non-volatile memory cells and input lines for receiving an indication of the random multi-page read operation. Further, the memory may include a multi-level volatile memory coupled to the core array that is configured to simultaneously process multiple pages of data from the core array in a pipelined manner. Output lines are coupled to the multi-level volatile memory and output the pages of data from the memory device.

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