Random access memory with access on bit boundaries

Details Random access memory with access on bit boundaries Random access memory with access on bit boundaries

1990-03-12

1992-06-09

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

Multiplexing

36523003, 36523004, 3652385, G11C 700

Patent

active

051213540

ABSTRACT:
A word addressable random access memory includes additional logic permitting accessing on bit boundaries during read/write operations requiring only one memory cycle. During each memory cycle, two "adjacent" word locations are selected for access concurrently in response to the decoding of one address. Logic responsive to bit boundary select signals determine which memory cells of the two "adjacent" word locations are in fact accessed to store or retrieve a word of data. In one preferred embodiment, the boundary select logic controls the data in/out lines of a pair of odd/even arrays. In another preferred embodiment, the boundary select logic includes logic within each cell of a single memory array.

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IBM Technical Disclosure Bulletin vol. 26, No. 12, pp. 6473-6475, Memory Transfer at Arbitrary Byte Boundaries (Tong).
Hill et al., Digital Systems, Hardware Organization and Design 3rd Edition, pp. 51-61.

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