Random access memory using precharge timers in test mode

Details Random access memory using precharge timers in test mode Random access memory using precharge timers in test mode

2005-11-15

2005-11-15

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S201000, C365S233100, C711S106000, C714S721000

Reexamination Certificate

active

06965534

ABSTRACT:
Embodiments of the present invention are illustrated in a random access memory. In one embodiment, the random access memory includes memory banks and precharge timers configured to provide precharge signals to the memory banks. Each of the precharge timers corresponds to one of the memory banks and each of the precharge timers is configured to provide one of the precharge signals to the corresponding one of the memory banks in normal mode and in test mode.

REFERENCES:
patent: 5357474 (1994-10-01), Matano et al.
patent: 5995426 (1999-11-01), Cowles et al.
patent: 6205068 (2001-03-01), Yoon
patent: 6272588 (2001-08-01), Johnston et al.
patent: 6512711 (2003-01-01), Wright et al.

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