Random access memory initialization

Details Random access memory initialization Random access memory initialization

2006-08-15

2006-08-15

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S166000, C711S165000, C713S001000, C713S100000, C370S449000, C370S450000, C370S451000, C370S462000

Reexamination Certificate

active

07093065

ABSTRACT:
A memory has a set of address spaces to which token data is written and read. Each address space has a token status bit. A token generator allocates token data to the memory address spaces. Upon a reset occurring, a logic circuit provides logic “0” to the token generator disabling status bit checking control so that all the tokens can be issued sequentially. New token data is allocated to the address spaces sequentially and the respective status bit is updated or maintained as logic “1”. When all address spaces have been allocated, the logic circuit provides the actual state of the status bit to the token generator to control subsequent allocations.

REFERENCES:
patent: 5893162 (1999-04-01), Lau et al.
patent: 6467023 (2002-10-01), DeKoning et al.
patent: 6529519 (2003-03-01), Steiner et al.

Affiliated with

Also associated with

Rating

Random access memory initialization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Random access memory initialization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Random access memory initialization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3711861