Random access memory block circuitry for programmable logic arra

Details Random access memory block circuitry for programmable logic arra Random access memory block circuitry for programmable logic arra

1995-11-08

1997-05-27

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Serial read/write

36523002, 36523009, G11C 700

Patent

active

056338309

ABSTRACT:
A relatively large block of random access memory ("RAM") may be provided on a programmable logic array integrated circuit device for use as read-only memory ("ROM") or RAM during operation of the device to perform logic. The RAM block is connected in the circuitry of the device so that it can be programmed and verified compatibly with other memory on the device. Thereafter the circuitry of the RAM block allows it to be switched over to operation as RAM or ROM during logic operation of the device.

REFERENCES:
patent: 5128559 (1992-07-01), Steele
patent: 5469400 (1995-11-01), Yamano
John L. Nichols, "A Logical Next Step for Read-Only Memories", Electronics, Jun. 12, 1967, pp. 111-113.
Floyd Kvamme, "Standard Read-Only Memories Simplify Complex Logic Design", Electronics, Jan. 5, 1970, pp. 88-95.
Albert Hemel, "Making Small ROM's [sic] Do Math Quickly, Cheaply and Easily", Electronics, May 11, 1970, pp. 104-111.
William I. Fletcher et al., "Simplify Sequential Circuit Designs", Electronic Design, Jul. 8, 1971, pp. 70-72.
Howard A. Sholl et al., "Design of Asynchronous Sequential Networks Using Read-Only Memories", IEEE Transactions on Computers, vol. C-24, No. 2, Feb. 1975, pp. 195-206.
Arnold Weinberger, "High-Speed Programmable Logic Array Adders", IBM J. Res. Develop., vol. 23, No. 2, Mar. 1979, pp. 163-178.
Yahiko Kambayashi, "Logic Design of Programmable Logic Arrays", IEEE Transactions on Computers, vol. C-28, No. 9, Sep. 1979, pp. 609-617.

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