Random access memory

Static information storage and retrieval – Read/write circuit – Precharge

Patent

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Details

3652335, 365190, G11C 700

Patent

active

053922492

ABSTRACT:
A semiconductor storage device which can perform reading operations at a high speed is provided. A voltage apply control circuit (21) captures an ATD control signal(S7) of an ATD control circuit (7) and an output signal (OUT) of an output buffer (6) and outputs a control signal (S21) to a voltage apply circuit (22) on the basis of the output signal (OUT) during an H level period of the ATD control signal (S7). The voltage apply circuit (22) applies voltages to a bit line BL and a bit line BL so that the bit line pair BL and BL is equalized in a shorter period as possible on the basis of the control signal (S21). The equalizing processing is accomplished at a high speed, which enables high-speed reading operations.

REFERENCES:
patent: 4924443 (1990-05-01), Mattausch
patent: 5029135 (1991-07-01), Okubo
patent: 5268874 (1993-12-01), Tamauchi

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