RAM row decode circuitry that utilizes a precharge circuit that

Details RAM row decode circuitry that utilizes a precharge circuit that RAM row decode circuitry that utilizes a precharge circuit that

1993-12-13

1995-03-21

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Precharge

36523006, 36523001, 36523003, 36518911, 326106, G11C 800, G11C 700

Patent

active

054002834

ABSTRACT:
There is a precharge circuitry that uses little real estate and can be deactivated once a word line driver is activated. Specifically, a high signal created by the selected driver is fed back to the precharge circuit to deactivate it when activating a chosen word line. Thus, alleviating the resulting effect between the low signal to activate the selected driver and the precharge high voltage current both using the same node coupled to the word line drivers.

REFERENCES:
patent: 4897568 (1990-01-01), Chern et al.
patent: 5132575 (1992-07-01), Chern
patent: 5206551 (1993-04-01), Chern
patent: 5245578 (1993-09-01), McLaury
patent: 5293342 (1994-03-01), Casper et al.
patent: 5302870 (1994-04-01), Chern
patent: 5311481 (1994-05-01), Casper et al.

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