Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1999-06-01
2002-06-25
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S799000
Reexamination Certificate
active
06412086
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to radio frequency identification (RFID) tag integrated circuits (ICs) and, more particularly, to RFID tag ICs that include on-chip test circuitry.
BACKGROUND OF THE INVENTION
Radio Frequency Identification (RFID) transponders (tags) are operated in conjunction with RFID base stations for a variety of inventory-control, security and other purposes. Typically an item having a tag associated with it, for example, a container with a tag placed inside it, is brought into a “read zone” established by the base station. The RFID base station generates a continuous wave electromagnetic disturbance at a carrier frequency. This disturbance is modulated to correspond to data that is to be communicated via the disturbance. The modulated disturbance, which carries information and may be sometimes referred to as a signal, communicates this information at a rate, referred to as the data rate, which is lower than the carrier frequency. The transmitted disturbance will be referred to hereinafter as a signal or field. The RFID base station transmits an interrogating RF signal which is modulated by a receiving tag in order to impart information stored within the tag to the signal. The receiving tag then transmits the modulated, answering, RF signal to the base station.
RFID tags may be active, containing their own RF transmitter, or passive, having no transmitter. Passive tags, i.e., tags that rely upon modulated back-scattering to provide a return link to an interrogating base station, may include their own power sources, such as a batteries, or they may be “field-powered”, whereby they obtain their operating power by rectifying an interrogating RF signal that is transmitted by a base station. Although both types of tag have minimum RF field strength read requirements, or read thresholds, in general, a field-powered passive system requires at least an order of magnitude more power in the interrogating signal than a system that employs tags having their own power sources. Because the interrogating signal must provide power to a field-powered passive tag, the read threshold for a field-powered passive tag is typically substantially higher than for an active tag. However, because field-powered passive tags do not include their own power source, they may be substantially less expensive than active tags and because they have no battery to “run down”, field-powered passive tags may be more reliable in the long term than active tags. And, finally, because they do not include a battery, field-powered passive tags are typically much more “environmentally-friendly”.
Although field-powered passive tag RFID systems provide cost, reliability, and environmental benefits, there are obstacles to the efficient operation of field-powered passive tag RFID systems. In particular, it is often difficult to deliver sufficient power from a base station to a field-powered passive tag via an interrogating signal. The amount of power a base station may impart to a signal is limited by a number of factors, not the least of which is regulation by the Federal Communication Commission (FCC). In addition to limits placed upon the base station's transmitted power, i.e., the power level at the base station's antenna input, RFID tags are often affixed to the surface of or placed within, a container composed of RF absorptive material. The container may move along a conveyor or roller system and, as the container enters the reading zone of a reading station, an interrogating signal is transmitted to the container. Ideally, the tag would be read regardless of the tag's location within the container or the orientation of the container as it passes the reading station. Unfortunately, the electromagnetic field pattern set up by an RF signal will typically include areas of relatively low field strength which preclude the reading of RF tags as they pass by a reading station. In the case of such a reading failure, a human operator may have to intervene by re-orienting the container and passing it by the read station once more. Alternatively, human operators may be required to orient containers in a preferred orientation so that the containers may be reliably read as they pass the reading station. Such human intervention can be a costly, time consuming, and relatively unreliable approach.
An RFID tag integrated circuit, which combines a variety of functions and technologies on a single integrated circuit, may be employed to reduce the costs, weight, and bulk of an RFID tag to a minimum. At the same time such an integrated circuit implementation provides the potential of greatly improving the reliability of an RFID tag. However, an integrated circuit implementation of an RFID tag's functionality might incorporate disparate functional blocks, such as a radio frequency front end processor for processing received radio signals, a signal processor for producing a return signal, control circuitry, and storage circuitry for retaining tag-related information. These functional elements may include analog, digital and memory circuitry. In a field-powered tag application the tag could employ electrically erasable programmable read only memory (EEPROM) to store and update tag-related information. As a result, the tag IC includes several disparate functional elements and it would be highly advantageous to include within the tag IC test circuitry that permits the efficient testing of such functional elements without devoting an excessive amount of circuitry or IC pins to the test function.
RELATED ISSUED PATENTS
Related U.S. Patents assigned to the assignee of the present invention include: U.S. Pat. Nos. 5,521,601; 5,528,222; 5,550,547; 5,673,037; 5,682,143; 5,786,626; 5,850,181; and 5,874,902. The above identified U.S. Patents and U.S. Patent applications are hereby incorporated by reference.
SUMMARY
A radio-frequency identification (RFID) transponder (tag) integrated circuit (IC) in accordance with the principles of the invention includes a serially loaded test mode register. The test mode register communicates with test circuitry also included within the IC to initiate testing one or more sections of the IC. In an illustrative embodiment, the tag IC includes a front end processor for processing received radio signals, a signal processor for producing a return signal, and the test circuitry, including the serially loaded test mode register.
In addition to the above functional divisions (i.e., front end, signal processing, etc.) the tag IC may include process divisions, in that it may include digital, analog, and EEPROM circuitry. Each segment of the tag IC may test circuitry associated with it, and the test circuitry may be controlled by entries in the serial test mode register. The tag IC's digital section may be tested via a partial scan that tests the IC data path and control logic. The digital section may also be tested by testing the IC's digital clock recovery and data recovery circuitry. The EEPROM circuitry may be tested by testing the write margin of the EEPROM, by “bulk even”, “bulk lock”, and “bulk odd” testing, and by control verification tests. The tag IC may also include analog circuitry and the test circuitry may test circuit parametrics, such as the tag IC's current drain, and bias levels.
The new tag IC may be operated in conjunction with an antenna to yield an RFID tag. Such a tag, in turn, may be operated along with an RFID base station to perform the functions of an RFID system.
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‘High spe
Dieska David E.
Friedman Daniel J.
Hodgson Rodney T.
Intermec IP Corp.
Torres Joseph D.
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