Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-06-20
1998-07-14
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438683, 438905, H01L 2128
Patent
active
057803609
ABSTRACT:
A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH.sub.4 into the chamber. Preferably, WSi.sub.x is deposited on a semiconductor wafer using a mixture comprising WF.sub.6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF.sub.6 and dichlorosilane by flowing SiH.sub.4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH.sub.4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress. A vacuum processing apparatus is also provided for practicing methods of the invention and includes a chamber, means for depositing a material, such as WSi.sub.x, on a surface of a substrate disposed within the chamber, and means for purging the chamber with SiH.sub.4.
REFERENCES:
patent: 4737474 (1988-04-01), Price et al.
patent: 4842892 (1989-06-01), Smith et al.
patent: 4902645 (1990-02-01), Ohba
patent: 4951601 (1990-08-01), Maydan et al.
patent: 4966869 (1990-10-01), Hillman et al.
patent: 5231056 (1993-07-01), Sandhu
patent: 5272112 (1993-12-01), Schmitz et al.
patent: 5326723 (1994-07-01), Petro et al.
patent: 5436200 (1995-07-01), Tanaka
patent: 5447887 (1995-09-01), Filipick et al.
patent: 5500249 (1996-03-01), Telford et al.
362 Japanese Journal of Applied Physics 29 (1990) Jan., No. 1, Part 2, Tokyo, JP, "Effect of Silicon Surface Cleaning on the Initial Stage of Selective Titanium Silicide Chemical Vapor Deposition", Kunio Saito, Takao Amazawa and Yoshinobu Arita, (Received Sep. 7, 1989, accepted for publication Dec. 6, 1989), pp. L 185-L 187.
1046 Journal of the Electrochemical Society 140 (1993) Dec., No. 12, Hooksett, NH, US, "Chemically Vapor Deposited Tungsten Silicide Films Using Dichlorosilane in a Single-Wafer Reactor, Growth, Properties, and Thermal Stability", S.G. Telford, M. Elizenberg, M. Chang and A.K. Sinha, pp. 3689-3701.
1046(b) Extended Abstracts Fall Meeting, Hollywood, FL, US89/2 (1989), Princeton, NJ, US, Absteract No. 372, "Film Nucleation Uniformity of Tungsten Silicide Deposited Using Dischlorosilane Reduction", T. Hara, H.hatiwars and T. Miyasoto, Dept. of Electrical Engineering Hosel University, p. 543.
IBM Technical Disclosure Bulletin, S. Basavaiah and R.V. Joshi, vol. 34, No. 3, Aug. 1991, "Stoichiometric CVD Wsi.sub.2 Flows", p. 77.
Chang Mei
Eizenberg Moshe
Rinnen Klaus-Dieter
Srinivas Ramanujapuram A.
Telford Susan Weihar
Applied Materials Inc.
Bilodeau Thomas G.
Niebling John
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