Punch-through load devices in high density static memory cell

Details Punch-through load devices in high density static memory cell Punch-through load devices in high density static memory cell

1979-01-02

1981-01-27

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

307279, 357 13, G11C 1140

Patent

active

042479150

ABSTRACT:
A semiconductor memory of the static type employs a pair of cross-coupled driver transistors and a pair of access transistors along with load devices which are punch-through elements resembling short channel MOS transistors without gates. The punch-through elements each have an electrode integral with the drain of one of the driver transistors, and another electrode coupled to a voltage supply. A cell layout of very small size is possible.

REFERENCES:
patent: 4158239 (1979-06-01), Bertin
Baitinger et al., Self-Restoring Six-Device FET Memory Cell, IBM Tech. Discl. Bul., vol. 14, No. 4, 9/71, pp. 1340-1341.

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