Pulsed-mode RF bias for side-wall coverage improvement

Details Pulsed-mode RF bias for side-wall coverage improvement Pulsed-mode RF bias for side-wall coverage improvement

2001-11-07

2004-01-06

Pert, Evan (Department: 2829)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Reexamination Certificate

active

06673724

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and method for processing substrates. Specifically, the invention relates to a method for depositing a conformal layer of material on a substrate in an ionized metal plasma process.
2. Background of the Related Art
Sub-quarter micron multi-level metallization represents one of the key technologies for the next generation of ultra large-scale integration (ULSI) for integrated circuits (IC). In the fabrication of semiconductor and other electronic devices, directionality of particles being deposited on a substrate is important to improve adequate in filling of electric features. As circuit densities increase, the widths of vias, contacts and other features, as well as the dielectric materials between them, decrease to 0.25 &mgr;m or less, whereas the thickness of the dielectric layer remains substantially constant. Thus, the aspect ratios for the features, i.e., the ratio of the depth to the minimum lateral dimension, increases, thereby pushing the aspect ratios of the contacts and vias to 5:1 and above. As the dimensions of the features decrease, it becomes even more important to directionally orient the flux of deposition material reaching the substrate in order to achieve conformal coverage of the feature sidewalls and bottoms.
Conventionally, physical vapor deposition (PVD) systems have been used to deposit materials in device features formed on a substrate. PVD systems are well known in the field of semiconductor processing for forming metal films. Generally, a power supply connected to a processing chamber creates an electrical potential between a target and a substrate support member within the chamber and generates a plasma of a processing gas in the region between the target and substrate support member. Ions from the plasma bombard the negatively biased target and sputter material from the target which then deposits onto a substrate positioned on the substrate support member. However, while such processes have achieved good results for lower aspect ratios, conformal coverage becomes difficult to achieve with increasing aspect ratios. In particular, it has been shown that coverage (i.e., deposited film thickness) of the bottoms of the vias decreases with increasing aspect ratios.
One process capable of providing greater directionality to particles is ionized metal plasma-physical vapor deposition (IMP-PVD), also known as high density physical vapor deposition (HDP-PVD). Initially, a plasma is generated by introducing a gas, such as helium or argon, into the chamber and then coupling energy into the chamber via a biased target to ionize the gas. A coil positioned proximate the processing region of the chamber produces an electromagnetic field which induces currents in the plasma resulting in an inductively-coupled medium/high density plasma between a target and a susceptor on which a substrate is placed for processing. The ions and electrons in the plasma are accelerated toward the target by a bias applied to the target causing the sputtering of material from the target by momentum transfer. A portion of the sputtered metal flux is then ionized by the plasma to produce metal ions in the case where the target comprises a metal. An electric field due to an applied or self-bias develops in the boundary layer, or sheath, between the plasma and the substrate that accelerates the metal ions towards the substrate in a vector parallel to the electric field and perpendicular to the substrate surface. The bias energy is preferably controlled by the application of power, such as RF or DC power, to the susceptor to attract the sputtered target ions in a highly directionalized manner to the surface of the substrate to fill the features formed on the substrate.
One of the problems with HDP-PVD processes is the inability to achieve conformal step coverage in the increasingly smaller device features. Conformal coverage of the bottom and sidewalls of the features is needed to optimize subsequent processes such as electroplating. Electroplating requires conformal barrier and seed layers within the device features in order to ensure uniform filling of the feature. While conventional HDP-PVD achieves good bottom coverage due to the directionality of the ions provided by the bias on the substrate, the sidewall coverage can be less than conformal. This result is caused in part by the induced high directionality of ions towards the bottom of the features with little directionality toward the sidewalls.
The effects of a bias on a substrate can be described with reference to
FIGS. 1-2
which illustrate the direction of metal ions
14
entering a via
16
formed on a substrate
10
.
FIG. 1
illustrates a traditional, i.e., non-HDP, PVD processing environment wherein no bias is supplied to the substrate
10
by an external power generator. In this configuration, the directionality of the ions
14
is determined primarily by the ejection profile of material (usually atoms) from the target and by the inelastic collisions with other particles in the chamber, such as Ar ions which are provided in a plasma. The angular distribution
22
of the ions
14
in
FIG. 1
typically results in little deposition on the bottom
18
of the via
16
and an increasingly thinner sidewall thickness as the feature bottom
18
is approached due to a large proportion of the ions
14
striking the substrate
10
at oblique angles.
FIG. 2
illustrates the processing environment in a HDP-PVD process wherein the angular distribution of the ions
14
is influenced by the electrical field E due to an applied or a self-bias at the surface of the substrate. The electric field E is oriented perpendicular to the substrate
10
and the positively charged ions
14
travel along a trajectory parallel to the electric field E toward the bottom
18
of the via
16
. The angular distribution
24
of the ions
14
in
FIG. 2
typically results in moderate to low deposition on the sidewalls
20
and high to moderate deposition on the bottom
18
than is possible without the bias. As compared to the angular distribution
22
of
FIG. 1
, the distribution
24
exhibits a tighter pattern indicating more directionality parallel to the electric field E.
Where the electric field E due to the applied bias on the substrate
10
is sufficiently strong, faceting and/or substantial resputtering can occur. Faceting refers to a phenomenon whereby the corners of features is partially etched by charged particles which may include ions from the plasma gas. Faceting can be undesirable because deformations of the device geometry can negatively affect subsequent processes such as electroplating. Additionally, faceting can lead to restricted feature openings and eventually to the formation of voids. Resputtering refers to the removal of deposited material from the substrate by the action of the impinging ions. Resputtering can be undesirable because of the potential for overhangs, i.e., relatively thicker portions of material near the opening of the features. Under the influence of the bias, the charged particles can gain enough kinetic energy to re-sputter a portion of the deposited material. In particular, the material is re-sputtered from the edges of the device features, such as vias, and from the fields of the substrate, which are the upper planar areas of the substrate formed between the features. The re-sputtered material then re-deposits on other areas of the substrate. While some degree of resputtering can be desirable, a problem arises when the re-sputtered material is non-uniformly re-deposited on other portions of the device features resulting in non-uniform device geometries.
The results of the resputtering are illustrated by
FIGS. 3 and 4
.
FIG. 3
is a cross section of a via
30
formed in a substrate
32
having a layer
34
formed thereon, which may be a barrier layer or a seed layer for example. Conventional PVD and HDP-PVD processes produce overhangs
36
which restrict the via
30
. The overhangs
36
are shown as portions of the depos

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