Protocol processor intended for the execution of a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C709S248000, C709S241000, C712S003000, C712S010000

Reexamination Certificate

active

07028145

ABSTRACT:
Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.

REFERENCES:
patent: 4101960 (1978-07-01), Stokes et al.
patent: 4212057 (1980-07-01), Devlin et al.
patent: 4591977 (1986-05-01), Nissen et al.
patent: 4780811 (1988-10-01), Aoyama et al.
patent: 4783778 (1988-11-01), Finch et al.
patent: 4945479 (1990-07-01), Rusterholz et al.
patent: 4964035 (1990-10-01), Aoyama et al.
patent: 5045993 (1991-09-01), Murakami et al.
patent: 5155843 (1992-10-01), Stamm et al.
patent: 5179530 (1993-01-01), Genusov et al.
patent: 5187796 (1993-02-01), Wang et al.
patent: 5197130 (1993-03-01), Chen et al.
patent: 5210834 (1993-05-01), Zurawski et al.
patent: 5210861 (1993-05-01), Shimoda
patent: 5237686 (1993-08-01), Asano et al.
patent: 5289588 (1994-02-01), Song et al.
patent: 5291581 (1994-03-01), Cutler et al.
patent: 5293602 (1994-03-01), Fukagawa et al.
patent: 5297267 (1994-03-01), Inoue
patent: 5740458 (1998-04-01), Chauvel et al.
patent: 6000026 (1999-12-01), Chauvel et al.
patent: 6085336 (2000-07-01), Swobada et al.
patent: 6108755 (2000-08-01), Kabemoto et al.
patent: 0 157 306 (1985-10-01), None
patent: 0 334 627 (1989-09-01), None
Mano, Computer System Architecture, Prentice-Hall Inc., 264, 282 and 283, 1982.
Morris Mano, Computer System Architecture, 1982, p. 502.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Protocol processor intended for the execution of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Protocol processor intended for the execution of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Protocol processor intended for the execution of a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3568389

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.