Protective cover plate for flip chip assembly backside

Details Protective cover plate for flip chip assembly backside Protective cover plate for flip chip assembly backside

1997-06-30

2002-06-11

Cuchlinski, Jr., William A. (Department: 3661)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C174S034000, C174S034000, C174S261000, C361S753000, C361S799000, C361S800000, C361S816000, C361S818000, C257S659000, C257S660000, C257S700000, C257S707000, C257S708000, C257S712000, C438S108000

Reexamination Certificate

active

06403882

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor devices and, more particularly, to a method and apparatus for protecting a semiconductor device.
BACKGROUND OF THE INVENTION
FIG. 5
illustrates a conventional chip package
300
. Typically, as shown in
FIG. 5
, the active surface
325
of a memory die
305
is flip chip attached to a chip-carrier
310
formed from printed circuit laminates. The inactive surface
320
of the memory die
305
is exposed and, thus, prone to handling-induced damage. The inactive surface
320
does not include interconnections to electrically couple the memory die
305
to other components. The active surface
325
of the memory die
305
is coupled to the chip carrier
310
by a C
4
array
315
(i.e., an array of solder interconnections). The active surface
325
includes interconnections to be electrically coupled to other components.
The memory die
305
has a very low thermal coefficient of expansion while the chip carrier
310
has a very high thermal coefficient of expansion. As a result, after the memory die
305
has been coupled to the chip carrier
310
and allowed to cool to room temperature, the memory die
305
bends so that the center of the memory die
305
moves away from,the chip carrier
310
in the direction of arrow A
1
. The peripheral area of the memory die
305
moves towards the chip carrier
310
in the direction of arrows A
2
. Consequently, the memory die
305
deflects, causing the memory die
305
to have an arcuate shape. This creates a large amount of shear between the memory die
305
and the chip carrier
310
which may cause the C
4
array
315
to fail.
To prevent the C
4
array
315
from failing, an expoxy
330
is applied between the chip carrier
310
and the memory die
305
. As a result, the memory die
305
and the chip carrier
310
are more strongly coupled together. Thus, the memory die
305
is further deflected, causing the inactive surface
320
of the memory die
305
to be under tension. If there are flaws in the inactive surface
320
, the memory die
305
may fracture. Typically, flaws in the inactive surface
320
of the die occur from pick-and-place machines used to move the memory die
305
or from handling of the memory die
305
. Inadvertent nicks and scratches on the memory die
305
can cause the flaws which result in incipient die cracking and, ultimately, catastrophic function failure of memory die
305
.
Thus, it is an object of the present invention to prevent the die from being damaged. It is a further object of the present invention to protect the die without exerting further forces on the die that could cause the die to fail.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its purposes, the present invention provides a chip package that includes a die having an active surface and an inactive surface. An adhesive is formed on the inactive surface where the adhesive has a low Young's modulus of elasticity. The low Young's modulus of elasticity may be 10,000 psi or less, or 1,000 psi or less. Further, the adhesive may include a thermal conducting material. A protective plate is disposed on the inactive surface using the adhesive and a chip carrier is coupled to the active surface of the die.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.


REFERENCES:
patent: 4388132 (1983-06-01), Hoge et al.
patent: 4535350 (1985-08-01), Goodrich et al.
patent: 4795680 (1989-01-01), Rich et al.
patent: 4933042 (1990-06-01), Eichelberger et al.
patent: 5249101 (1993-09-01), Frey et al.
patent: 5331513 (1994-07-01), Hirai et al.
patent: 5349500 (1994-09-01), Casson et al.
patent: 5390082 (1995-02-01), Chase et al.
patent: 5414928 (1995-05-01), Bonitz et al.
patent: 5438216 (1995-08-01), Juskey et al.
patent: 5641946 (1997-06-01), Shim
patent: 5710071 (1998-01-01), Beddingfield et al.
patent: 5773884 (1998-06-01), Andros et al.
patent: 5847929 (1998-12-01), Bernier et al.
patent: 5856911 (1999-01-01), Riley
patent: 5889332 (1999-03-01), Lawson et al.
patent: 5933713 (1999-08-01), Farnworth
patent: 6294405 (2001-09-01), Higgins, III
patent: 2001/0017413 (2001-08-01), Jiang et al.
patent: 2002/0019073 (2002-02-01), Moon
patent: 1235261 (1989-09-01), None
patent: 6310564 (1994-11-01), None
Page 168 from Webster Dictionary, tenth edition, 1977.

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