Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-02-19
2003-06-03
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S691000
Reexamination Certificate
active
06573177
ABSTRACT:
DESCRIPTION OF THE INVENTION
1. Field of the Invention
This invention relates in general to a semiconductor manufacturing process and, more particularly, to a method for preventing under-layer damage during deposition processes.
2. Background of the Invention
With sub-micron semiconductor manufacturing processes being the prevalent technology in today's semiconductor manufacturing process, the demand for a high-resolution photolithographic process has increased. The resolution of a conventional photolithographic method is primarily dependent upon the wavelength of a light source, which dictates a certain fixed distance between patterns on a photoresist. The distance separating patterns smaller than the wavelength of the light source could not be accurately patterned and defined.
Prior art light sources with shorter wavelengths are normally used in a high-resolution photolithographic process. In addition, the depth of focus of a high-resolution photolithographic process is shallower than a relative low-resolution photolithographic process. Thus, a photoresist layer having a lower thickness is required. However, a photoresist layer with a low thickness is susceptible to damages from subsequent deposition steps as the reactive gases used in deposition steps react with certain layers of material. This susceptibility reduces the precision of patterning and defining of a photoresist, which prevents the dimensions of patterns on a photoresist from being reduced.
It is accordingly a primary object of the invention to provide a method for preventing under-layer from damage caused by subsequent deposition steps.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a semiconductor manufacturing method that includes defining a substrate, depositing a first layer over the substrate, providing a protection layer over the first layer, providing a layer of photoresist over the protection layer, patterning and defining the photoresist layer, and depositing a second layer over the patterned and defined photoresist layer with a chemical-vapor deposition process having at least one reactive gas, wherein the protection layer is non-reactive with the at least one reactive gas.
In one aspect, the layer of inorganic material is substantially conformal.
In another aspect, the step of depositing a second layer is performed at a temperature lower than a stability temperature of the patterned and defined photoresist layer.
Also in accordance with the present invention, there is provided a semiconductor manufacturing method that includes defining a substrate, depositing a first layer over the substrate, providing a protection layer over the first layer, providing a layer of photoresist over the protection layer, patterning and defining the photoresist layer to form at least one photoresist structure having at least one substantially vertical sidewall and one substantially horizontal top, depositing a photo-insensitive material over the at least one photoresist structure and the protection layer with a chemical-vapor deposition process having at least one reactive gas, wherein an amount of the photo-insensitive material deposited on the top of the photoresist structure is substantially greater than an amount of the photo-insensitive material deposited on the at least one sidewall of the photoresist structure, and wherein the protection layer is non-reactive with the at least one reactive gas, and anisotropically etching the protection layer and the layer to be etched.
In one aspect, the step of depositing a photo-insensitive material comprises a step of depositing a layer of polymer.
In another aspect, the amount of the photo-insensitive material deposited on the top of the photoresist structure is substantially greater than an amount of the photo-insensitive material deposited on the protection layer.
Further in accordance with the present invention, there is provided a semiconductor manufacturing method that includes defining a substrate, providing a first layer over the substrate, providing a protection layer over the first layer, providing a layer of photoresist over the protection layer, patterning and defining the photo resist layer to form at least two photo resist structures, wherein each of the photoresist structures includes substantially vertical sidewalls and a substantially horizontal top, and wherein the photoresist structures are separated by a space, depositing a layer of polymer on the tops of the photoresist structures and the space separating the photoresist structures with a chemical-vapor deposition process having at least one reactive gas, wherein an amount of the polymer deposited on the tops of the photoresist structures is substantially greater than an amount of the polymer deposited on the sidewalls of the photoresist structures, and wherein the protection layer is non-reactive with the at least one reactive gas, and anisotropically etching the polymer on the tops of the photoresist structures and in the space between the photoresist structures, the protection layer, and the first layer.
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
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patent: 6399236 (2002-06-01), Ueno
Chung Chai-Chi
Liang Ming-Chung
Tsai Stefan
Dang P.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Macronix International Co. Ltd.
Nelms David
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