Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-11-13
2003-06-03
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S157000, C438S283000
Reexamination Certificate
active
06573145
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a process for producing an MOS (Metal Oxide Semiconductor) field effect transistor with a recombination zone, wherein the process is distinguished by a robust manufacturing sequence. The invention relates in particular to a process for producing an MOS field effect transistor having a horizontal buried gate formed of polysilicon and a recombination zone provided on a side of the surface of the MOS field effect transistor.
A conventional n-channel MOS power transistor has a parasitic bipolar transistor that includes the source region as an emitter, the channel or the so-called p-body region as the part of individual silicon islands forming the channel zone in the insulating layer as a base, and the substrate as a collector. In the case of such a transistor, if a more negative voltage is present on its drain connection than on the source connection, then the latter is not able to block the current flow since, in order to prevent a premature breakdown of the parasitic transistor in the structure, the source region and p-body region are short-circuited.
If, nevertheless, the pn junction between the source region and p-body region is to maintain its blocking capability, it is therefore necessary to prevent the premature breakdown of the parasitic bipolar transistor by other measures.
For this purpose, hitherto either an additional diode has been connected in series, which disadvantageously results in an additional undesired voltage drop in the circuit, or freewheeling diodes have been used and, in accordance with their dimensioning, an undesired controlled current flow through the power transistor had to be accepted.
More recent developments seek to introduce a recombination zone into the p-body region, through the use of which zone the base current of the parasitic bipolar transistor can be suppressed in such a way that no premature breakdown is triggered by the current. In this case, it was initially proposed to substantially maintain the geometry of the transistors involved and, additionally, to introduce a metal into the p-body region. Complicated, less tolerant process sequences with high requirements on the precision of the individual processes proved to be disadvantageous here, and also problems on account of interactions between the metal introduced and the silicon present.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a process for producing an MOS field effect transistor which overcomes the above-mentioned disadvantages of the heretofore-known processes of this general type and which provides a MOS transistor having a recombination zone and which avoids problems attributable to interactions between metal and silicon.
With the foregoing and other objects in view there is provided, in accordance with the invention, a process for producing an MOS field effect transistor, which includes the steps of:
providing a base material including a buried oxide layer and a thin active silicon layer;
structuring the base material having the buried oxide layer and the active silicon layer for providing a structured region in the base material;
depositing silicon onto the structured region of the base material and outside the structured region of the base material by using an epitaxial deposition process;
contra-doping a channel region;
exposing partial regions of the buried oxide layer;
performing an etching process for removing any silicon oxide at least from the structured region of the base material;
forming a gate oxide and a horizontal buried gate formed of polysilicon;
structuring the polysilicon;
producing a source doping in a structured manner;
producing a dielectric in a structured manner;
providing a recombination zone at a surface region of the MOS field effect transistor by structuring a metal to be used for recombination; and
producing gate and source contacts for the MOS field effect transistor.
According to the invention, a process is therefore proposed in which all the steps requiring a high temperature for the production of, for example, doped regions, gate oxides, insulation regions and gate regions formed of polysilicon are carried out first and only then is the metal serving for recombination brought into contact with the p-body region, which achieves a reversal of the configuration of the gate formed of polysilicon and the recombination zone and, as a result, disadvantageous interactions between the metal introduced and the silicon present are avoided.
The base material preferably used is a wafer-bonded SOI material.
Particular advantages result if the buried oxide layer is produced by implantation of oxygen.
If, in particular, such implantation of oxygen is carried out in a structured manner, the steps of structuring a base material with a buried oxide layer and a thin active silicon layer, and also the epitaxial deposition of silicon onto the structured base material and outside the same can be dispensed with, which results in an advantageous simplification and shortening of the process duration.
With the objects of the invention in view there is therefore also provided, a process for producing an MOS field effect transistor, the process includes the steps of:
providing a base material;
implanting oxygen into the base material in a structured manner for providing a buried oxide layer;
contra-doping a channel region;
exposing partial regions of the buried oxide layer;
performing an etching process for removing any silicon oxide;
forming a gate oxide and a horizontal buried gate formed of polysilicon;
structuring the polysilicon;
producing a source doping in a structured manner;
producing a dielectric in a structured manner;
providing a recombination zone at a surface region of the MOS field effect transistor by structuring a metal to be used for recombination; and
producing gate and source contacts for the MOS field effect transistor.
The sequence of process steps specified in the above-defined processes does not necessarily have to be maintained in the order in which they are listed.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a process for producing an MOS field effect transistor with a recombination zone, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 5120666 (1992-06-01), Gotou
patent: 5578513 (1996-11-01), Maegawa
patent: 5877528 (1999-03-01), So
patent: 6291863 (2001-09-01), Chan
patent: 31 31 914 (1983-02-01), None
patent: 199 49 364 (2000-04-01), None
Brophy Jamie L.
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
LandOfFree
Process for producing an MOS field effect transistor with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for producing an MOS field effect transistor with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for producing an MOS field effect transistor with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3091410