Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-02-23
2008-10-21
Huynh, Andy (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE21679, C257SE23114
Reexamination Certificate
active
07439575
ABSTRACT:
A pre-metal dielectric structure of a SONOS memory structure includes a UV light-absorbing film, which prevents the ONO structure from being electronically charged in response to UV irradiation. In one embodiment, the pre-metal dielectric structure includes a first pre-metal dielectric layer located over the SONOS memory structure, a light-absorbing structure located over the first pre-metal dielectric layer, and a second pre-metal dielectric layer located over the light-absorbing structure. The light-absorbing structure can be a continuous polysilicon or amorphous silicon layer. Alternately, the light-absorbing structure can include one or more patterned polysilicon layers. In another embodiment, the SONOS transistors include UV light absorbing polysilicon spacers.
REFERENCES:
patent: 3743847 (1973-07-01), Boland
patent: 5051793 (1991-09-01), Wang
patent: 5168334 (1992-12-01), Mitchell et al.
patent: 5424569 (1995-06-01), Prall
patent: 5825059 (1998-10-01), Kuroda
patent: 6081456 (2000-06-01), Dadashev
patent: 6181597 (2001-01-01), Nachumovsky
patent: 6256231 (2001-07-01), Lavi
patent: 6297173 (2001-10-01), Tobin et al.
patent: 6410210 (2002-06-01), Gabriel
patent: 6440797 (2002-08-01), Wu et al.
patent: 6680509 (2004-01-01), Wu et al.
patent: 6765254 (2004-07-01), Hui et al.
patent: 6765259 (2004-07-01), Kim
patent: 6774432 (2004-08-01), Ngo et al.
patent: 2004/0046215 (2004-03-01), Hasunuma et al.
patent: 2001-284563 (2001-12-01), None
“Mechanism of Charge Induced Plasma Damage to EPROM Cells During Fabrication of Integrated Circuits”, by C.K. Barlingay, R. Yach & W. Likaszek; 7thInt'l. Symposium on Plasma- and Process-Induced Damage, Jun. 2002, Hawaii.
“Avoiding Plasma Induced Damage To Gate Oxide Wtih Conductive Top Film (CTF) on PECVD Contact Etch Stop Layer”, by S. Song et al., 2002 Symposium On VLSI Technology Digest of Technical Papers.
Aloni Efraim
Ben-Gigi Avi
Gutman Micha
Roizin Yakov
Vofsy Menachem
Bever Hoffman & Harms
Hoffman E. Eric
Huynh Andy
Tower Semiconductor Ltd.
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