Programming of an EPROM

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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365104, G11C 700

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active

047208163

ABSTRACT:
A system and method for programming an EPROM which includes a bit line, a plurality of memory cell MOS transistors connected to the bit line, a switching transistor for selectively applying a programming voltage to the bit line, and a selection circuit for selecting one of the memory transistors for programming. In accordance with the principle of the present invention, when one of the memory transistors is selected for programming, the programming voltage is applied to the bit line and thus to the drain of the selected memory transistor and to the gate of the selected memory transistor. Then, even after termination of application of the programming voltage to the bit line, the programming voltage remains to be applied to the gate for a predetermined time period, thereby allowing charge stored in the parasitic capacitance of the bit line to be completely discharged through the selected transistor.

REFERENCES:
patent: 4388541 (1983-06-01), Giebel
patent: 4524430 (1985-06-01), Page
patent: 4641285 (1987-02-01), Sasaki et al.

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