Programmable read ports and write ports for I/O buses in a field

Details Programmable read ports and write ports for I/O buses in a field Programmable read ports and write ports for I/O buses in a field

1998-11-12

2000-07-18

Hoang, Huan

Static information storage and retrieval

Read/write circuit

Multiplexing

36523002, 36518905, G11C 700

Patent

active

060916451

ABSTRACT:
A field programmable memory array having a plurality of sub-arrays is provided. Programmable address decoders, programmable hierarchical bit line arrangements, programmable I/O arrangements, among other features, are provided to enable programming of portions of the array into selected modes. The modes may include wide memory, deep memory, FIFO, LIFO, among others. An embodiment of the invention is disclosed wherein the field programmable memory array is integrated with the programmable resources of a field programmable gate array.

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