Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2005-05-10
2008-09-23
Connolly, Mark (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S375000, C713S600000
Reexamination Certificate
active
07428652
ABSTRACT:
A method and apparatus to support communication between components in different clock domains having a rational clock frequency ratio of N/D. In one embodiment, a combination of integer phase generators are employed to produce phase control signals during an overall cycle having N phases, wherein the overall cycle is a combination of primary cycles having D phases and an adjustment cycle having R phases, wherein R is the remainder of N/D. For clock frequency ratios of less than 2:1, a combination of 2:1 and 1:1 phase generators are employed. Clocking signals are generated by phase generator logic to provide timing control between communicating components in the different clock domains. In one embodiment, the phase generator logic is implemented in a programmable phase generator.
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PCT/US2006/017049, PCT International Search Report and Written Opinion of the International Searching Authority, Nov. 22, 2006.
Lee Kok Lim Patrick
Lim Soon Chieh
Rodriguez Jose M.
Abbaszadeh Jaweed A
Blakely , Sokoloff, Taylor & Zafman LLP
Connolly Mark
Intel Corporation
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