Programmable multi-mode built-in self-test and self-repair...

Details Programmable multi-mode built-in self-test and self-repair... Programmable multi-mode built-in self-test and self-repair...

2007-10-16

2007-10-16

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S718000, C714S733000

Reexamination Certificate

active

11197989

ABSTRACT:
A built-in self-test and self-repair structure (BISR) of memory arrays embedded in an integrated device includes at least a test block (BIST) programmable to execute on a respective memory array of the device any of a certain number of test algorithms, and a self-repair block that includes a column address generator processing the faulty address information for allocating redundant resources of the tested memory array. The BISR may further include a redundancy register on which final redundancy information is loaded at each power-on of the device and control logic for managing data transfer from external circuitry to the built-in self-test and self-repair structure (BISR) and vice versa. The BIST structure serves any number of embedded memory arrays even of different types and sizes.

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Benso et al., Programmable Built-In Self-Testing of Embedded RAM Clusters in System-On-Chip Architectures, IEEE Communications Magazine, IEEE Service Center, Piscataway, NJ, US, vol. 41, No. 9, Sep. 2003, pp. 90-97.

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