Programmable hysteresis for boundary-scan testing

Details Programmable hysteresis for boundary-scan testing Programmable hysteresis for boundary-scan testing

2007-05-22

2007-05-22

Chung, Phung My (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C327S077000, C327S205000

Reexamination Certificate

active

10666770

ABSTRACT:
Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.

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IEEE 1149.6: Boundary Scan Standard for Advanced Digital Networks, Eklow et al, Sep.-Oct. 2003, pp. 76-83.
Advanced I/O Working Group of the Test Technology Standards Committee fo the IEEE Computer Society, “Draft Standard for Boundary-Scan Testing of Advanced Digital Networks”, Jun. 4, 2002, IEEE P1149.6:D3.1,110 pages.
IEEE P1149.6:D3.1; Prepared by the Advanced I/O Working Group of the Test Technology Standards Committee of the IEEE Computer Society; Draft Standard for Boundary-Scan Testing of Advanced Digital Networks; Jun. 4, 2002; 13 Pages.

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