Programmable hardware timer including two programmable hardware

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

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G06F 108

Patent

active

059876182

ABSTRACT:
A programmable hardware timer provides a relatively consistently measure of predetermined time intervals over a relatively wide range of performance levels. The programmable hardware timer includes a downcounter, driven by a predetermined clock frequency, that counts a preprogrammed number of preselected time intervals. The time intervals, also programmable, are written to registers which, in turn, are used to control the downcounter such that the zero flag on the downcounter goes active at the predetermined time interval. A second downcounter is used to enable multiples of the predetermined time interval to be selected.

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patent: 4638248 (1987-01-01), Schweickert
patent: 4641563 (1987-02-01), Nagashima
patent: 4949339 (1990-08-01), Shimada et al.
patent: 5041964 (1991-08-01), Cole et al.
patent: 5214785 (1993-05-01), Fairweather
patent: 5455907 (1995-10-01), Hess et al.

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