Programmable gate array having shared signal lines for interconn

Details Programmable gate array having shared signal lines for interconn Programmable gate array having shared signal lines for interconn

1997-03-12

1999-06-08

Tokar, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 41, H03K 19177

Patent

active

059107324

ABSTRACT:
Shared signal lines for interconnection of logic elements and configuration of a programmable gate array. A signal line which is shared for purposes of interconnection and configuration saves chip space. During configuration, a shared signal line is used to route configuration bits to configuration memory cells, and during operation of the programmable gate array, the shared signal line is used to interconnect logic elements of the programable gate array.

REFERENCES:
patent: 5237219 (1993-08-01), Cliff
Xilinx, Inc., "The Programmable Logic Data Book," Sep. 1996, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124.
Betty Prince, "Semiconductor Memories", copyright 1983, 1991, John Wiley & Sons, pp. 149-174.
Anthony Stansfield et al., "The Design of a New FPGA Architecture", 1995, Computer Science 975.

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