Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1980-07-16
1982-03-09
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365104, G11C 1140
Patent
active
043193439
ABSTRACT:
A programmable digital memory circuit uses a programmable read only memory (PROM) to correct code errors and permit expansion to additional PROM chips. Each code correction or expansion is made via enabling a portion of an overlay patch programmable read only memory (PROM) for a similar portion of the memory circuit at an address code burned into the overlay trap (PROM). Initially the overlay trap PROM is unprogrammed, and each bit location therein can act as an enable/disable selection to a 32 byte block in the overlay patch PROM. When a bit in the overlay trap PROM is programmed and when the memory address selects that location, the main memory is unselected and the patch PROM location is selected, i.e., substituted. The 256 bit locations in the overlay trap PROM can select 256 32 byte patches in the patch PROM for substitution in the main memory. Each patch may be added simply by burning one more location in the overlay trap PROM and inserting the corrected code data into the overlay patch PROM at the corresponding location. In addition to the overlay capability, the memory circuit allows each integrated circuit (IC) memory chip socket on a printed circuit broad to be individually configured to any of a number of memory chip types. Memory address bits are decoded by a "mapping" PROM which is programmed to select any one of the sockets in a memory array and to concurrently configure two electrical connections which are common to all of the chip sockets to properly enable the memory chip in the selected socket. This allows multiple types of integrated circuit (IC) memory chips can be used with an individual selection without the need of physical changes in the layout of the printed circuit card supporting the chips.
REFERENCES:
patent: 4048626 (1977-09-01), Fett
Burton Lockwood D.
Fears Terrell W.
Halista Mitchell J.
Honeywell Inc.
Marhoefer Laurence J.
LandOfFree
Programmable digital memory circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programmable digital memory circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable digital memory circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1844440