Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-11-07
2006-11-07
Ho, Tu-Tu (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S239000, C257S315000
Reexamination Certificate
active
07132711
ABSTRACT:
Structures and methods for programmable array type logic and/or memory with p-channel devices and asymmetrical low tunnel barrier intergate insulators are provided. The programmable array type logic and/or memory devices include p-channel non-volatile memory which has a first source/drain region and a second source/drain region separated by a p-type channel region in an n-type substrate. A floating gate opposing the p-type channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by an asymmetrical low tunnel barrier intergate insulator. The asymmetrical low tunnel barrier intergate insulator includes a metal-oxide insulator selected from the group consisting of Al2O3, Ta2O5, TiO2, ZrO2, Nb2O5, SrBi2Ta2O3, SrTiO3, PbTiO3, and PbZrO3. The floating gate includes a polysilicon floating gate having a metal layer formed thereon in contact with the low tunnel barrier intergate insulator. And, the control gate includes a polysilicon control gate having a metal layer, having a different work function from the metal layer formed on the floating gate, formed thereon in contact with the low tunnel barrier intergate insulator.
REFERENCES:
patent: 4295150 (1981-10-01), Adam
patent: 4688078 (1987-08-01), Hseih
patent: 4757360 (1988-07-01), Faraone
patent: 4780424 (1988-10-01), Holler et al.
patent: 4939559 (1990-07-01), DiMaria et al.
patent: 5071782 (1991-12-01), Mori
patent: 5350738 (1994-09-01), Hase et al.
patent: 5399516 (1995-03-01), Bergendahl et al.
patent: 5418389 (1995-05-01), Watanabe
patent: 5474947 (1995-12-01), Chang et al.
patent: 5488612 (1996-01-01), Heybruck
patent: 5498558 (1996-03-01), Kapoor
patent: 5508544 (1996-04-01), Shah
patent: 5600592 (1997-02-01), Atsumi et al.
patent: 5618575 (1997-04-01), Peter
patent: 5618761 (1997-04-01), Eguchi et al.
patent: 5619051 (1997-04-01), Endo
patent: 5627785 (1997-05-01), Gilliam et al.
patent: 5691230 (1997-11-01), Forbes
patent: 5801401 (1998-09-01), Forbes
patent: 5852306 (1998-12-01), Forbes
patent: 5880991 (1999-03-01), Hsu et al.
patent: 5923056 (1999-07-01), Lee et al.
patent: 5936274 (1999-08-01), Forbes et al.
patent: 5959465 (1999-09-01), Beat
patent: 5981350 (1999-11-01), Geusic et al.
patent: 5986932 (1999-11-01), Ratnakumar et al.
patent: 5991225 (1999-11-01), Forbes et al.
patent: 6009011 (1999-12-01), Yamauchi
patent: 6025228 (2000-02-01), Ibok et al.
patent: 6025627 (2000-02-01), Forbes et al.
patent: 6031263 (2000-02-01), Forbes et al.
patent: 6069380 (2000-05-01), Chou et al.
patent: 6108240 (2000-08-01), Lavi et al.
patent: 6124729 (2000-09-01), Noble et al.
patent: 6134175 (2000-10-01), Forbes et al.
patent: 6141238 (2000-10-01), Forbes et al.
patent: 6141248 (2000-10-01), Forbes et al.
patent: 6143636 (2000-11-01), Forbes et al.
patent: 6153468 (2000-11-01), Forbes et al.
patent: 6163049 (2000-12-01), Bui
patent: 6208164 (2001-03-01), Noble et al.
patent: 6210999 (2001-04-01), Gardner et al.
patent: 6229175 (2001-05-01), Uchida
patent: 6238976 (2001-05-01), Noble et al.
patent: 6246606 (2001-06-01), Forbes et al.
patent: 6249020 (2001-06-01), Forbes et al.
patent: 6249460 (2001-06-01), Forbes et al.
patent: 6307775 (2001-10-01), Forbes et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6341084 (2002-01-01), Numata et al.
patent: 6351411 (2002-02-01), Forbes et al.
patent: 6377070 (2002-04-01), Forbes
patent: 6424001 (2002-07-01), Forbes et al.
patent: 6433382 (2002-08-01), Orlowski et al.
patent: 6461931 (2002-10-01), Eldridge
patent: 6514842 (2003-02-01), Prall et al.
patent: 6541280 (2003-04-01), Kaushik et al.
patent: 6574143 (2003-06-01), Nakazato
patent: 6586797 (2003-07-01), Forbes et al.
patent: 6730575 (2004-05-01), Eldridge
patent: 6740928 (2004-05-01), Yoshii et al.
patent: 6754108 (2004-06-01), Forbes
patent: 6778441 (2004-08-01), Forbes et al.
patent: 6881994 (2005-04-01), Lee et al.
patent: 6952032 (2005-10-01), Forbes et al.
patent: 6958937 (2005-10-01), Forbes et al.
patent: 6963103 (2005-11-01), Forbes
patent: 2001/0013621 (2001-08-01), Kazuo
patent: 2001/0041250 (2001-11-01), Werkhoven et al.
patent: 2002/0008324 (2002-01-01), Shinkawata
patent: 2002/0106536 (2002-08-01), Lee et al.
patent: 2002/0109158 (2002-08-01), Forbes et al.
patent: 2002/0137250 (2002-09-01), Nguyen et al.
patent: 2003/0043637 (2003-03-01), Forbes et al.
patent: 2003/0207032 (2003-11-01), Ahn et al.
patent: 2003/0207540 (2003-11-01), Ahn et al.
patent: 2005/0023595 (2005-02-01), Forbes et al.
patent: 2005/0023603 (2005-02-01), Eldridge et al.
patent: 2005/0169054 (2005-08-01), Forbes
patent: 2006/0001049 (2006-01-01), Forbes
Afanas'Ev, V., et al. ,“Electron energy barriers between (100)Si and ultrathin stacks of SiO2, Al2O3, and ZrO3 and ZrO2 insulators”,Applied Physics Letters, 78(20), (2001),pp. 3073-3075.
Arya, S., “Conduction Properties of Thin Al2O3 Films”,Thin Solid Films, 91, (1982),pp. 363-374.
Dipert, Brian “Flash Memory Goes Mainstream”,IEEE Spectrum, 30, (Oct. 1993),48-52.
Eldridge, J., et al. ,“Analysis of Ultrathin Oxide Growth on Indium”,Thin Solid Films, 12, (1972),pp. 447-451.
Eldridge, J., “Measurement of Tunnel Current Density in a Metal-Oxide-Metal System as a Function of Oxide Thickness”,Proc. 12th Intern. Conf. on Low Temperture Physics, (1971),pp. 427-428.
Greiner, J.G. ,“Josephson Tunneling Barriers by rf Sputter Etching in an Oxygen Plasma”,Journal of Applied Physics, vol. 42, No. 12, (Nov. 1971),5151-5155.
Greiner, J., “Oxidation of lead films by rf sputter etching in an oxygen plasma”,Journal of Applied Physics, 45(1), (1974),pp . 32-37.
Grimbolt, J., et al. ,“I. Interaction of Al Films with O2 at Low Pressures”,Journal of the Electrochemical Society, 129(10), (1982),pp. 2366-2368.
Grimbolt, J., et al. ,“II. Oxidation of Al Films”,Journal of Electrochem Soc.: Solid-State Science and Technology, (1982),pp. 2369-2372.
Gundlach, K., “Logarithmic Conductivity of Al-Al2O3-Al Tunneling Junctions Produced by Plasma and by Thermal Oxidation”,Surface Science, 27, (1971),pp. 125-141.
Guo, X., et al. ,“High Quality Ultra-thin (1.5 nm) TiO2/Si3N4 Gate Dielectric for Deep Sub-micron CMOS Technology”,IEDM Technical Digest, (1999),pp. 137-140.
Hurych, Z., “Influence of Non-Uniform Thickness of Dielectric Layers on Capacitance and Tunnel Currents”,Solid-State Electronics, vol. 9, (1966),967-979.
Itokawa, H., et al. ,“Determination of Bandgap and Energy Band Alignment for High-Dielectric-Constant Gate Insulators Using High-Resolution X-ray Photoelectron Spectroscopy”,Extended Abstracts of the 1999 International Conference on Solid State Devices and MAterials, (1999),pp. 158-159.
Kim, H., et al. ,“Leakage current and electrical breakdown in metal-organic chemical vapor deposited TiO2 dielectrics on silicon substrates”,Applied Phys. Lett., 69(25), (1996),pp. 3860-3862.
Kubaschewski, O., et al. ,Oxidation of Metals and Alloys, Second Edition, Butterworths, London,(1962),pp. 1-3, 5,6, 8-12, 24, 36-39.
Kubaschewski, O..,“Oxidation of Metals and Alloys”,Butterworths. London, (1962), 53-63.
Kukli, K., et al., “Development of Dielectric Properties of Niobium Oxide, Tantalum Oxide, and Aluminum Oxide Based Nanolayered Materials”,Journal of HTe Electrochemical Society, 148(2), (2001),pp. F35-F41.
Kwo, J., et al. ,“Properties of high k gate dielectrics Gd2O3 and Y2O3 for Si”,Journal of Applied Physics, 89(7), (2001),pp. 3920-3927.
Luan, H., “High Technology Ta2O5 Gate Dielectrics with Tox,eq<10A”,IEDM, (1999),pp. 141-144.
Ma, Y., et al. ,“Zirconium Oxide Based Gate Dielectrics with Dielectrics with Equivalents Oxide Thickness of LEss Than 1.0 nm and Performance of Submicron MOSFET using a Nitride Gate Replacement Process”,IEDM—Technical Digest, (1999),pp. 149-152.
Masuoka, Fujio.,“A 256K flash EEPROM using Triple Polysilicon Technology&#x
Ahn Kie Y.
Eldridge Jerome M.
Forbes Leonard
Ho Tu-Tu
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
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