Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-19
1998-06-02
Kunemund, Robert
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438292, 117939, 148 332, H01L 21201
Patent
active
057598983
ABSTRACT:
A process and method for producing strained and defect free semiconductor layers. In a preferred embodiment, silicon on insulator may be used as a substrate for the growth of fully relaxed SiGe buffer layers. A new strain relief mechanism operates, whereby the SiGe layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an SOI substrate with a superficial silicon thickness. Initially the strain in the SiGe layer becomes equalized with the thin Si layer by creating tensile strain in the Si layer. Then the strain created in the thin Si layer is relaxed by plastic deformation during an anneal. Since dislocations are formed, and glide in the thin Si layer, threading dislocations are not introduced into the upper SiGe material. A strained silicon layer for heterostructures may then be formed on the SiGe material.
REFERENCES:
patent: 4857270 (1989-08-01), Maruga et al.
Kesan et al. "Si/SiGe Heterostructures Grown on SOI Substrates by MBE for Integrated Optoelectronics," Journal Crystal Growth, vol. 111 No. 1-4 (1991) pp. 936-942.
Ek Bruce A.
Iyer Subramanian Srikanteswara
Pitner Philip Michael
Powell Adrian R.
Tejwani Manu Jamndas
International Business Machines - Corporation
Kunemund Robert
Morris Daniel P.
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