Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2009-02-17
2011-10-18
Tsai, Henry (Department: 2184)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S005000, C711S118000, C711S150000, C711S153000, C710S005000, C710S021000, C710S052000, C710S065000, C345S501000, C345S530000, C345S544000, C345S557000
Reexamination Certificate
active
08041903
ABSTRACT:
A processor and a memory controlling method. The processor enables a Scratch-Pad Memory (SPM) to prepare data that a processor core intends to process, using a data management unit including a data cache, thereby increasing a data processing rate.
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‘Rasterisation’ article on Wikipedia.org.
‘GPUTeraSort: High Performance Graphics Coprocessor Sorting for Large Database Management’ by Naga K. Govindaraju et al., Copyright 2006 ACM.
Kwon Kwon Taek
Lee Won Jong
Min Kyoung June
Park Chan Min
Samsung Electronics Co,. Ltd.
Snyder Steven
Staas & Halsey , LLP
Tsai Henry
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