Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-04-26
2011-04-26
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S283000, C257S340000, C257SE21002
Reexamination Certificate
active
07932148
ABSTRACT:
This invention discloses an improved trenched metal oxide semiconductor field effect transistor (MOSFET) device that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a shielded gate trench (SGT) structure below and insulated from the trenched gate. The SGT structure is formed substantially as a round hole having a lateral expansion extended beyond the trench gate and covered by a dielectric liner layer filled with a trenched gate material. The round hole is formed by an isotropic etch at the bottom of the trenched gate and is insulated from the trenched gate by an oxide insulation layer. The round hole has a lateral expansion beyond the trench walls and the lateral expansion serves as a vertical alignment landmark for controlling the depth of the trenched gate. The MOSFET device has a reduced gate to drain capacitance Cgd depending on the controllable depth of the trenched gate disposed above the SGT structure formed as a round hole below the trenched gate.
REFERENCES:
patent: 6075269 (2000-06-01), Terasawa et al.
patent: 6150210 (2000-11-01), Arnold
patent: 7154144 (2006-12-01), Kim et al.
Chang Hong
Li Tiesheng
Tai Sung-Shan
Wang Yu
Alpha & Omega Semiconductor, Ltd
Lin Bo-In
Novacek Christy L
Smith Zandra
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