Processes for making a single election transistor with a...

Details Processes for making a single election transistor with a... Processes for making a single election transistor with a...

2006-02-14

2006-02-14

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S962000

Reexamination Certificate

active

06998310

ABSTRACT:
This invention relates to a process for a manufacturing a Coulomb blockade transistor. The process comprises the following steps in sequence: deposition on an insulating substrate of a source layer, a tunnel-insulating layer and an alternating stack of at least one conducting layer and at least one insulating layer, a first etching of the stack to form a filiform tab, coating of the filiform tab with an electrically insulating coating material, a second etching of the tab of the stack to form a pillar, the second etching preserving the coating material to define a groove on each side of the pillar, the formation of at least one isolated grid in the groove, and the formation of a drain in contact with one end of the pillar opposite the source layer, through at least one tunnel-insulating layer.

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Huang, Shujuan et al., “Control of Interdot Space and Dot Size in a Two-Dimensional Gold Nanodot Array”, Japanese Journal of Applied Physics, vol. 38, No. 4B, Part 2, pp. L473-L476, Apr. 15, 1999.
International Search Report, for International Application No. PCT/FR02/03354, date mailed Feb. 6, 2003.

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