Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-09
1999-12-07
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438664, H01L 218238
Patent
active
059982470
ABSTRACT:
The present invention discloses a method to fabricate the non-silicide region for an ESD protective devices in a substrate. Firstly, a substrate is provided and it has field oxide regions to define an electrostatic discharge (ESD) region, a PMOS region and an NMOS region. A gate and a gate oxide for the NMOS region and the PMOS region are define. An N-type and a P-type ion implantation are respectively performed to form a lightly doped drain (LDD) for said NMOS region and said PMOS region. A P-type and an N-type implantation is implemented to form source/drain regions for the NMOS device and the PMOS device, respectively. Afterwards, a silicon oxide layer is defined to form spacers for the polysilicon layer and the gates for the NMOS region and the PMOS region. A self-aligned silicide process is performed to form a silicide layer on the gate and the source/drain regions for the PMOS device and the NMOS device. The polysilicon layer is etched back to form a gate for a ESD protective device and an implantation process is performed to form source/drain regions of the ESD protective device.
REFERENCES:
patent: 4717684 (1988-01-01), Katto et al.
patent: 5529941 (1996-06-01), Huang
patent: 5532178 (1996-07-01), Liaw et al.
patent: 5589423 (1996-12-01), White et al.
patent: 5672527 (1997-09-01), Lee
Chaudhari Chandra
Texas Instruments - Acer Incorporated
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