Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-22
2000-02-01
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438222, 438296, 438429, 438432, 438424, 438445, H01L 218238, H01L 21336, H01L 2176
Patent
active
060202300
ABSTRACT:
The method in the present invention is proposed for forming trench isolation in a semiconductor substrate. The method includes the steps as follows. At first, a pad layer is formed over the substrate. A first stacked layer is then formed over the pad layer. Next, a second stacked layer is formed over the first stacked layer. An opening is defined in the second stacked layer, the first stacked layer, and the pad layer. The opening extends down to the substrate. A portion of the substrate is then removed for forming an upper-half portion of a trench by using the second stacked layer as a mask. A sidewall structure is formed on the opening. Next, a portion of the substrate is removed for forming a lower-half portion of the trench by using the sidewall structure as a mask. The sidewall structure and the second stacked layer are removed. Following with the formation of a first insulating layer over the trench, a second insulating layer is formed over the first insulating layer and over the first stacked layer. A semiconductor layer is then formed over the second insulating layer. A portion of the semiconductor layer is oxidized for forming a third insulating layer. Finally, a filling layer is formed over the third insulating layer and the substrate is planarized for having a planar surface.
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Pompey Ron
Texas Instruments--Acer Incorporated
Tsai Jey
LandOfFree
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