Process of manufacturing thin ball grid array substrates

Details Process of manufacturing thin ball grid array substrates Process of manufacturing thin ball grid array substrates

2000-08-11

2001-08-14

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S687000, C438S107000, C438S109000, C438S612000

Reexamination Certificate

active

06274491

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is related to a process of manufacturing thin ball grid array substrates and in particular to one which can provide a thin ball grid array substrate with thicker circuit lines without electroplating bus lines remaining.
2. Description of the Prior Art
Lightness, thinness and compactness are requisites for portable electronic devices, and so thin ball grid array substrates are widely used in these devices for achieving these purposes. The conventional process of manufacturing thin ball grid array falls into two categories, i.e. electrolytic electroplating and chemical electroplating.
The electrolytic electroplating process includes the following steps:
a. utilizing apolyimide film as a carrier
11
;
b. forming a thin copper layer
12
on the carrier
11
by sputtering;
c. forming a thick copper
13
(which is thicker that the thin copper layer
12
) on the thin copper layer
12
by flash plating;
d. coating the top and bottom surfaces of the carrier
11
with a layer of photosensitive material
14
;
e. mounting a mask
15
with optically transmissible circuit track
151
on each of the top and bottom sides of the carrier
11
, and then processing the carrier with exposure treatment;
f. processing the carrier
11
with development treatment to remove the photosensitive material aligned to the circuit track
151
thereby forming a recessed electrical circuit track diagram;
g. forming a copper layer
16
on the top surface of the carrier
11
by electroplating so that the copper layer
16
is coated on the copper layer
13
forming the recessed electrical circuit track with a top surface even with the photosensitive material layer
14
;
h. etching the bottom of the carrier
11
so as to remove the polyimide film aligned with the circuit track of the mask
15
;
i. washing away photosensitive material with chemicals;
j. removing surplus copper layer
13
resulting in the circuit lines
19
and the electroplating bus lines
17
remaining (see
FIG. 1
l
); and
k. connecting electroplating bus lines
17
to positive and negative electrodes of an electroplating apparatus to coat a metal layer
18
of nickel, gold, or the like on the circuit lines
19
.
Although the electrolytic electroplating process can provide thicker circuits and enables a manufacturer to select one of a number of metals to coat on the copper circuit, the electroplating bus lines
17
will remain, thereby often causing delay in high speed signal transmission, producing noise, and attenuating signal energy.
The chemical electroplating process can form an additional coating of nickel, gold, tin, or the like to cover the electroplating lines on the circuit, but the coating thickness is limited. Accordingly, there is no process which can provide a thick circuit without electroplating bus lines.
Therefore, it is an object of the present invention to provide a process of manufacturing thin ball grid array substrates.
SUMMARY OF THE INVENTION
This invention is related to a process of manufacturing thinf ball grid array substrates and in particular to one which can provide a thin ball grid array substrate with thicker circuit lines without electroplating lines remaining.
It is the primary object of the present invention to provide a process of manufacturing thin ball array substrates which includes the steps of: using a layer of polyimide film as a carrier, sputtering a thinner copper layer on the polyimide film, flash plating a thicker copper layer on the thinner copper layer, applying photosensitive coating layers on both sides of the carrier, mounting two masks with optically transmissible circuit tracks on two sides of the carrier and then processing the carrier with exposure treatment, processing the carrier with development treatment so as to remove the photosensitive coating layers aligned with the circuit track thereby forming recessed circuit tracks on the photosensitive coating layers, electroplating a copper layer on a top of the carrier thereby forming an additional copper layer on the thicker copper layer, etching the bottom of the carrier to remove the upper recessed circuit track thereon, coating the copper layer on the upper recessed circuit track with soldering metallic material so as to make a top of the soldering metallic material, washing away the photosensitive coating layers with a chemical agent, and removing the surplus copper layer to remain in circuit lines and the soldering metallic material.
The foregoing object and summary provide only a brief introduction to the present invention. To fully appreciate these and other objects of the present invention as well as the invention itself, all of which will become apparent to those skilled in the art, the following detailed description of the invention and the claims should be read in conjunction with the accompanying drawings. Throughout the specification and drawings identical reference numerals refer to identical or similar parts. Many other advantages and features of the present invention will become manifest to those versed in the art upon making reference to the detailed description and the accompanying sheets of drawings in which a preferred structural embodiment incorporating the principles of the present invention is shown by way of illustrative example.


REFERENCES:
patent: 5843806 (1998-12-01), Tsai
patent: 5949141 (1999-09-01), Farnworth et al.
patent: 5990553 (1999-11-01), Morita et al.
patent: -02000049254- (2000-02-01), None

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