Process of manufacturing semiconductor device

Details Process of manufacturing semiconductor device Process of manufacturing semiconductor device

2006-08-25

2010-02-23

Garber, Charles D. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S113000, C438S460000, C438S510000, C438S513000, C438S514000, C438S527000, C438S710000, C438S033000, C257S347000, C257S758000, C257S355000, C257SE23011, C257SE23012, C257SE21502, C257SE21503, C257SE21590, C257SE23020

Reexamination Certificate

active

07666747

ABSTRACT:
A method that suppresses etching damage without increasing a chip area of a semiconductor device. An integrated circuit including a MOS transistor is formed in a device area, and a discharge diffusion region is formed in a device area, and a discharge diffusion region is formed in a grid area. The discharge diffusion region is connected to a metal wiring of the integrated circuit via a contact hole. Therefore, when the metal wiring is formed by a dry etching method, an electric charge stored in the metal wiring is discharged to a semiconductor substrate through the discharge diffusion region. Thus, etching damage of the MOS transistor is reduced. Since the discharge diffusion region and the contact hole are formed within the grid area, they are cut off by a dicing process, thus causing no increase in chip area of the semiconductor device.

REFERENCES:
patent: 6034433 (2000-03-01), Beatty
patent: 6433403 (2002-08-01), Wilford
patent: 6787432 (2004-09-01), Nagatomo
patent: 6847096 (2005-01-01), Yanai et al.
patent: 6849929 (2005-02-01), Naiki
patent: 2005/0151194 (2005-07-01), Chen et al.

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