Process of manufacturing a trenched stack-capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438 3, 438240, 438397, H01L 218242

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active

058375783

ABSTRACT:
A trenched stack-capacitor applied in a memory unit is formed through a simple process of manufacturing a stack capacitor with high density. The process includes steps of: a) forming a contact window in the insulator for exposing a cell contact of the device; b) forming a first conducting layer over the insulator and on side-walls and a base of the contact window; c) forming an etching sacrificial layer over the first conducting layer and in the contact window; d) forming an etching masking layer over a portion of the etching sacrificial layer; e) forming a plural cylindrical etching sacrificial areas by removing an another portion of the etching sacrificial layer while retaining the etching sacrificial layer under the etching masking layer; f) forming a second conducting layer on the top of the etching masking layer, on side walls of the plural cylindrical etching sacrificial areas, over the first conducting layer and in the contact window; g) removing the plural cylindrical etching sacrificial areas while retaining the first conducting layer and the second conducting layer to form a first capacitor plate; h) forming a dielectric layer on the top of the first conducting layer and on the top and side walls of the second conducting layer; and i) forming a third conducting layer over the dielectric layer to serve as a second capacitor plate.

REFERENCES:
patent: 5563762 (1996-10-01), Leung et al.
patent: 5716875 (1998-02-01), Jones, Jr. et al.

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