Process of forming high-k gate dielectric layer for metal...

Details Process of forming high-k gate dielectric layer for metal... Process of forming high-k gate dielectric layer for metal...

2006-01-31

2006-01-31

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S785000

Reexamination Certificate

active

06991989

ABSTRACT:
A process of forming a high-k gate dielectric layer is applied in forming semiconductor devices such as metal oxide semiconductor transistor or memory devices. A metal layer such as Hf or Zr is formed on a substrate. The substrate is then dipped in an acidic solution such as a nitric acid aqueous solution to form a high-K metal oxide layer including oxides or silicate with a predetermined thickness. Thereby, leakage current is effectively reduced to meet the requirement of currently technology nodes.

REFERENCES:
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6420279 (2002-07-01), Ono et al.
patent: 6559051 (2003-05-01), Buynoski et al.
patent: 2003/0049942 (2003-03-01), Haukka et al.

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