Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-03-26
1999-07-20
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, 438239, 438381, H01L 218242
Patent
active
059267097
ABSTRACT:
A node contact hole is formed in an inter-level insulating layer through an anisotropic etching using an inner conductive side wall formed in a primary opening as an etching mask, and an outer conductive side wall concurrently formed from a doped polysilicon together with a conductive plug in the node contact hole increases the surface area of a storage node electrode of a stacked storage capacitor.
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Aisou Fumiki
Hirota Toshiyuki
Gurley Lynne A.
NEC Corporation
Niebling John F.
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