Process for the manufacturing of integrated circuits comprising

Details Process for the manufacturing of integrated circuits comprising Process for the manufacturing of integrated circuits comprising

1996-03-08

2000-02-08

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438273, 438302, 438257, 438324, H01L 21336

Patent

active

060227788

ABSTRACT:
A process for the manufacturing of an integrated circuit having DMOS-technology power devices and non-volatile memory cells provides for forming respective laterally displaced isolated semiconductor regions, electrically insulated from each other and from a common semiconductor substrate, inside which the devices will be formed; forming conductive gate regions for the DMOS-technology power devices and for the memory cells over the respective isolated semiconductor regions. Inside the isolated semiconductor regions for the DMOS-technology power devices, channel regions extending under the insulated gate regions are formed. The channel regions are formed by an implantation of a dopant along directions tilted of a prescribed angle with respect to a direction orthogonal to a top surface of the integrated circuit, in a dose and with an energy such that the channel regions are formed directly after the implantation of the dopant without performing a thermal diffusion at a high temperature of the dopant.

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Smayling, Michael, A Modular Merged Technology Process including Submicron CMOS Logic, Novolatile Memories, Linear Functions, and Power Components, in 1993 Custom Integrated Circuits Conference, San Diego, California, May 9-12, 1993, pp. 24.5.1-24.5.4.

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