Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-08-09
2004-10-05
Le, D (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S396000, C257S295000, C257S783000
Reexamination Certificate
active
06800521
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices and the fabrication thereof. More particularly, the present invention pertains to diffusion barrier layers.
2. State of the Art
Integrated circuits typically include various conductive layers. For example, in the fabrication of semiconductor devices such as dynamic random access memories (DRAMs) and static random access memories (SRAMs), conductive materials are typically used in the formation of storage cell capacitors and interconnection structures (e.g., conductive layers in contact holes, vias, etc.). In many applications, such materials must provide effective diffusion barrier characteristics, which are required for conductive materials used in the formation of semiconductor structures, such as storage cell capacitors of memory devices (e.g., DRAMs).
As memory devices become more dense in terms of memory capacity per unit area, it is necessary to decrease the size of circuit components forming such devices. In order to retain storage capacity of storage cell capacitors of the memory devices while decreasing the memory device size, the dielectric constant of the dielectric layer of the storage cell capacitor is increased. To accomplish these goals, high dielectric constant materials interposed between two electrodes are used in such applications. When one or more layers of various conductive materials are used as the electrode material, the conductive materials must have certain diffusion barrier properties, such as silicon diffusion barrier properties (e.g., when the bottom electrode of a cell capacitor is used as an electrode). Such properties are particularly critical when high dielectric constant materials are used (e.g., in the dielectric layer of the storage cell capacitor) given that the processes used for forming such high dielectric constant materials usually occur at high temperatures (generally greater than about 500° C.) in an oxygen-containing atmosphere.
Various metals and metallic compounds, for example, metals such as platinum and conductive metal oxides such as ruthenium oxide, have been proposed for use as electrodes or as electrode stack layers with high dielectric constant materials. However, such electrical connections must be constructed so as to not diminish the beneficial properties of the high dielectric constant materials. For example, in order for platinum or ruthenium oxide to function well as a bottom electrode or as one of the layers of an electrode stack, an effective barrier to the diffusion of silicon from the substrate or other silicon-containing region to the top of the electrode must be provided. This is required to prevent silicon at the surface of the electrode stack from being oxidized during the oxygen anneal of the high dielectric constant materials, e.g., Ta
2
O
5
or BaSrTiO
3
, which oxidation results in a decreased series capacitance and, in turn, degradation of the storage capacity of the cell capacitor. Similarly, O
2
diffusing through the platinum or RuO
2
to the underlying Si yields SiO
2
at the base of the electrode, thus decreasing series capacitance. Platinum and ruthenium oxide, when used alone as an electrode, are generally too permeable to oxygen and silicon to be used as a bottom electrode of a storage cell capacitor formed on a silicon substrate region. Due to the permeability of such materials to oxygen and silicon, platinum is typically used as a layer in an electrode stack, acting as the electrode using a distinct diffusion barrier for integration of capacitors directly formed on silicon.
Examples of the foregoing structures and methods are known in the art. For example, as described in the article “Novel High Temperature Multilayer Electrode-Barrier Structure for High Density Ferroelectric Memories” by H. D. Bhatt, et al.,
Appl. Phys. Letter,
71(5), Aug. 4, 1997, the electrode barrier structure includes layers of platinum:rhodium alloy, in addition to platinum:rhodium oxide layers, to form electrodes with diffusion barrier properties. Such alloy layers are formed using physical vapor deposition (PVD) processing (e.g., reactive RF sputtering processes). Further, for example, the article entitled “(Ba, Sr)TiO
3
Films Prepared by Liquid Source Chemical Vapor Deposition on Ru Electrodes” by Kawahara et al.,
Jpn. J Appl. Phys.,
Vol. 35 (1996) Pt. 1, No. 9B, pp. 4880-4885, describes the use of ruthenium and ruthenium oxide for forming electrodes in conjunction with high dielectric constant materials.
In view of the aforementioned shortcomings of the methods and structures being currently practiced, it would be advantageous to provide a barrier layer that maintains the performance of high dielectric capacitors, prevents oxidation of underlying Si contacts, and prevents silicon diffusion into an electrode or dielectric. It would be of further advantage to form a barrier layer that reduces or eliminates the diffusion or migration of ruthenium into an elemental Si or a silicide layer, or vice versa, which typically occurs as a result of the high solubility of silicon in ruthenium.
SUMMARY OF THE INVENTION
The present invention provides RuSi
x
O
y
-containing diffusion barrier layers, along with structures incorporating such diffusion barrier layers and methods of fabricating the same.
A method of fabricating semiconductor devices and assemblies (e.g., integrated circuits) according to the present invention includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The diffusion barrier layer includes RuSi
x
O
y
, where x and y are in the range of about 0.01 to about 10. The diffusion layer may, additionally, include Ru and/or RuSi
x
. In one particular embodiment of the method, the diffusion barrier layer is formed of RuSi
x
O
y
, where x is in the range of about 0.1 to about 3, and more preferably is about 0.4, and where y is in the range of about 0.01 to about 0.1, and more preferably 0.1.
In another embodiment of the method, the barrier layer is formed by depositing a mixed film of Ru—RuSi
x
—RuSi
x
O
y
by chemical vapor deposition (CVD). In yet another embodiment of the method, the barrier layer is formed by CVD deposition of Ru—RuSi
x
O
y
in an oxidizing atmosphere. All of the foregoing barrier layers and mixed films may also be formed by atomic layer deposition. This process can result in the formation of multiple RuSi
x
O
y
-containing diffusion barrier monolayers and, more preferably, formation of from three to five monolayers of RuSi
x
O
y
-containing diffusion barrier layers.
In an alternative embodiment, the barrier layer is formed by physical vapor deposition (PVD) of the diffusion barrier layers of the present invention. In one particular embodiment of the PVD deposition method, mixed films of Ru—RuSi
x
—RuSi
x
O
y
are deposited to form a diffusion barrier layer. Alternatively, mixed films of Ru—RuSi
x
O
y
may be deposited to form a diffusion barrier layer.
A method for use in the formation of a capacitor according to the present invention includes forming a first electrode on a portion of a substrate assembly. A high dielectric material is formed over at least a portion of the first electrode and a second electrode is formed over the high dielectric material. At least one of the first and second electrodes includes a barrier layer formed of RuSi
x
O
y
, where x and y are in the range of about 0.01 to about 10.
According to yet another method of the present invention, a capacitor is formed by providing a silicon-containing region of a substrate assembly. A first electrode is then formed on at least a portion of the silicon-containing region of the substrate assembly. The first electrode includes a barrier layer having RuSi
x
O
y
, where x and y are in the range of about 0.01 to about 10. A high dielectric material is then formed over at least a portion of the first electrode and a second electrode is provided over the high dielectric material.
In an alternative embodiment of the method, one or more conductive layers
Le D
Micro)n Technology, Inc.
TraskBritt
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